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Quantum Dot Cellular Automata Simulation
Michálik, Juraj ; Bidlo, Michal (referee) ; Sekanina, Lukáš (advisor)
This bachelor thesis describes the origin and purpose of quantum cellular automata (QCA), their function and physical construction. It also describes the quantum cellular cell and principles of making simple circuits using these cells. The work contains an overview of available QCA simulators. More attention is given to the QCAD simulator, which has been utilized in the experimental part of this work. QCA are analyzed from the view of errors during fabrication, difficulty of the physical construction and the importance for modern electronics. Elementary study materials and set of examples have also been created.
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Approximation of Digital Circuits in Yosys Tool
Plevač, Lukáš ; Vašíček, Zdeněk (referee) ; Mrázek, Vojtěch (advisor)
The goal of this work is introduction of cgploss extension. This extension is extension for combinational logic circuits optimization in Yosys tool. Cartesian genetic programming is introduced in the first part of this work. Cartesian genetic programming is a design and optimization method that can be used for circuit optimization and approximation. This chapter introduces representation of combinational logic circuits for Cartesian genetic programming. The next chapter introduces Yosys tool and possibilities of the Yosys extending. The proposed 'cgploss' extension is introduced in the next chapter. The chapter also provides details about the implementation and the usage. The last chapter tests cgploss extension and compares representation of combinational logic circuits.
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Application of SAT Solvers in Circuit Optimization Problem
Minařík, Vojtěch ; Mrázek, Vojtěch (referee) ; Vašíček, Zdeněk (advisor)
This thesis is focused on the task of application of SAT problem and it's modifications in area of evolution logic circuit development. This task is supposed to increase speed of evaluating candidate circuits by fitness function in cases where simulation usage fails. Usage of SAT and #SAT problems make evolution of complex circuits with high input number significantly faster. Implemented solution is based on #SAT problem. Two applications were implemented. They differ by the approach to checking outputs of circuit for wrong values. Time complexity of implemented algorithm depends on logical complexity of circuit, because it uses logical formulas and it's satisfiability to evaluate logic circuits.
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Evolutionary Design Using Random Boolean Networks
Mrnuštík, Michal ; Žaloudek, Luděk (referee) ; Bidlo, Michal (advisor)
This master's thesis introduces the Random Boolean Networks as a developmental model in the evolutionary design. The representation of the Random Boolean Networks is described. This representation is combined with an evolutionary algorithm. The genetic operators are described too. The Random Boolean Networks are used as the developmental model for the evolutionary design of the combinational circuits and the sorting networks. Moreover a representation of the Random Boolean Networks for the design of image filters is introduced. The proposed methods are evaluated in different case-studies. The results of the experiments are discussed together with the potential improvements and topics of the next research.
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Evolutionary Resynthesis of Combinational Circuits
Kocnová, Jitka ; Sekanina, Lukáš (referee) ; Vašíček, Zdeněk (advisor)
This master thesis is concerned about the resynthesis of combinational circuits with the help of evolutional principles. The first part of this text describes logic synthesis and its weak spots, evolutional synthesis and its advantages, and also some of the existing synthesis programs. The second part shows usage of graph algorithms in logic synthesis and their possible usage in an extension for the chosen synthesis program. Suggested design and practical implementation of the extension is also described in this part. In the third part extension testing is mentioned. The fourth part is the last one and concludes gained knowledge and results.
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ALPS Technique in Cartesian Genetic Programming
Stanovský, Peter ; Slaný, Karel (referee) ; Sekanina, Lukáš (advisor)
This work introduces a brief summary of softcomputing and the solutions to NP-hard problems. It especially deals with evolution algorithms and their basic types. The next part involves the study of cartesian genetic programming, which belongs to the field of evolution algorithms, used mainly in the evolution of digital circuits, symbolic regression, etc. A special chapter is devoted to the studies of new technique Age layered population structure, which deals with the problems of premature convergence, which suggests the way of how the population could be divided into subpopulations split up according to the age criteria. Thanks to the maintaining of sufficient diversity, it achieves substantially better solutions in comparison to the classical evolution algorithms. This papier includes the suggestion of two ways of incorporation of the ALPS technique into CGP. In the next part of work there were carried out tests on the classic problems, that would be solved with evolution algorithms. These tests were made with and without using ALPS technique. In the part of work "Experimental results" there was discussed a contribution of using ALPS technique in CGP against the classic CGP.
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Approximation of Digital Circuits in Yosys Tool
Plevač, Lukáš ; Vašíček, Zdeněk (referee) ; Mrázek, Vojtěch (advisor)
The goal of this work is introduction of cgploss extension. This extension is extension for combinational logic circuits optimization in Yosys tool. Cartesian genetic programming is introduced in the first part of this work. Cartesian genetic programming is a design and optimization method that can be used for circuit optimization and approximation. This chapter introduces representation of combinational logic circuits for Cartesian genetic programming. The next chapter introduces Yosys tool and possibilities of the Yosys extending. The proposed 'cgploss' extension is introduced in the next chapter. The chapter also provides details about the implementation and the usage. The last chapter tests cgploss extension and compares representation of combinational logic circuits.
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Application of SAT Solvers in Circuit Optimization Problem
Minařík, Vojtěch ; Mrázek, Vojtěch (referee) ; Vašíček, Zdeněk (advisor)
This thesis is focused on the task of application of SAT problem and it's modifications in area of evolution logic circuit development. This task is supposed to increase speed of evaluating candidate circuits by fitness function in cases where simulation usage fails. Usage of SAT and #SAT problems make evolution of complex circuits with high input number significantly faster. Implemented solution is based on #SAT problem. Two applications were implemented. They differ by the approach to checking outputs of circuit for wrong values. Time complexity of implemented algorithm depends on logical complexity of circuit, because it uses logical formulas and it's satisfiability to evaluate logic circuits.
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|
|
Evolutionary Resynthesis of Combinational Circuits
Kocnová, Jitka ; Sekanina, Lukáš (referee) ; Vašíček, Zdeněk (advisor)
This master thesis is concerned about the resynthesis of combinational circuits with the help of evolutional principles. The first part of this text describes logic synthesis and its weak spots, evolutional synthesis and its advantages, and also some of the existing synthesis programs. The second part shows usage of graph algorithms in logic synthesis and their possible usage in an extension for the chosen synthesis program. Suggested design and practical implementation of the extension is also described in this part. In the third part extension testing is mentioned. The fourth part is the last one and concludes gained knowledge and results.
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Quantum Dot Cellular Automata Simulation
Michálik, Juraj ; Bidlo, Michal (referee) ; Sekanina, Lukáš (advisor)
This bachelor thesis describes the origin and purpose of quantum cellular automata (QCA), their function and physical construction. It also describes the quantum cellular cell and principles of making simple circuits using these cells. The work contains an overview of available QCA simulators. More attention is given to the QCAD simulator, which has been utilized in the experimental part of this work. QCA are analyzed from the view of errors during fabrication, difficulty of the physical construction and the importance for modern electronics. Elementary study materials and set of examples have also been created.
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